1. Technical Field
Various embodiments generally relate to a on chip logic block, system, and memory device and, more particularly, to a on chip logic block, system, and memory device including an ECC (error correction code) circuit.
2. Related Art
In general, in a memory device and a system, an ECC (error correction code) function is used to detect and correct an error likely to occur in the course of storing or reading data. An ECC algorithm may include a hamming code scheme capable of correcting an error of 1 bit per unit data or a BCH code scheme capable of correcting an error of plural bits. The ECC function is used in both a DRAM as a representative volatile memory device and a flash memory as a representative nonvolatile memory device.
Generally, an ECC circuit, which performs the ECC function, may generate and store not only data bits but also parity bits, determine whether an error occurs in data to be written or read, by using the parity bits, and correct an error which has occurred. A general ECC operation may be performed between a host and a memory device.
Recently, a 3D memory device in which a plurality of chips are stacked to form a single memory device is being developed to increase data storage capacities. With this development, the bandwidths of the memory devices are being significantly increased. Therefore, it may be necessary that an ECC operation be performed in a memory device regardless of a host.